| 摘要 |
An integrated circuit having a resistive memory including a resistive memory element, a selection device, a conductive line, and a reference electrode is disclosed. In one embodiment, the conductive line is set to a first voltage for establishing a first resistive state of the resistive memory element and to a second voltage, being lower than the first voltage, for establishing a second resistive state of the resistive memory element. The reference electrode is coupled to the resistive memory element and is set to a voltage level being provided between the first voltage and the second voltage.
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