| 摘要 |
PROBLEM TO BE SOLVED: To solve problems in layout design of a custom core such as memory core or analog core, in which it is difficult to recognize current information during manual layout design, and layout design based on electromigration becomes further difficult, resulting in increased man-hours for correction after layout design since a rule for electromigration is complicated due to segmented processes. SOLUTION: The method comprises steps of processing current information obtained from a result of circuit simulation to a current component; determining and appropriately changing the wiring width or the number of vias using information on an allowable current value to electromigration of wiring and vias; and detecting and correcting a place which tends to cause errors for electromigration. COPYRIGHT: (C)2008,JPO&INPIT
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