发明名称 |
Method of verifying interconnection reliability and method of manufacturing semiconductor device |
摘要 |
Provided are a method of verifying line reliability and a method of fabricating a semiconductor substrate to improve the line reliability. The semiconductor device fabricating method includes: forming an interlayer insulating layer having a via hole on a semiconductor substrate; forming a seed layer on the interlayer insulating layer; performing an ammonia plasma process on the seed layer to reduce the surface of the seed layer; and forming a copper line using the surface roughness reduced seed layer. |
申请公布号 |
KR100852602(B1) |
申请公布日期 |
2008.08.14 |
申请号 |
KR20060135753 |
申请日期 |
2006.12.27 |
申请人 |
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发明人 |
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分类号 |
H01L21/28;H01L21/02;H01L21/3205 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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