发明名称 DATA PROCESSOR AND DATA PROCESSING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a data processor and a data processing method capable of surely and accurately processing data even if a clock signal of a high frequency is used. <P>SOLUTION: The data processor, in which data is output from an SDRAM 24 to an ASIC part 10 according to a clock signal of a predetermined period generated by a high-frequency clock generator 20 and the data input is processed by the ASIC part 10, has clock signal feedback means 26, 27, 28 for feeding the clock signal output from the ASIC part 10 back to the ASIC part 10. The ASIC part 10 processes the data from the SDRAM 24 according to the period of the clock signal fed back by the clock signal feedback means 26, 27, 28. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008186154(A) 申请公布日期 2008.08.14
申请号 JP20070017979 申请日期 2007.01.29
申请人 KYOCERA CORP 发明人 KUMAMOTO TETSUSHI
分类号 G06F1/06;G06F12/00;G06F13/42;H03K19/0175 主分类号 G06F1/06
代理机构 代理人
主权项
地址