| 摘要 |
<p>A method for forming a gate of a semiconductor device is provided to more easily and effectively planarize the surface of an uneven conductive layer for a control gate by performing a reflow process on the conductive layer. A gate insulation layer(104) and a first conductive layer(106) are formed in an active region of a semiconductor substrate(102), and an isolation layer having a smaller height than that of the first conductive layer is formed in an isolation region of the semiconductor substrate. A dielectric layer(110) is formed on the resultant structure. A second conductive layer(114) is formed on the dielectric layer. A reflow process is performed in a manner that a step formed on the surface of the second conductive layer is removed to planarize the second conductive layer. A passivation layer(112) can be formed between the dielectric layer and the second conductive layer.</p> |
