CIRCUIT FOR DELAYING SIGNAL OF SEMICONDUCTOR MEMORY APPARATUS

摘要

A delay circuit of a semiconductor memory device is provided to enable a delay signal at timing when an input signal is disabled. A pulse generation unit(10) generates a pulse enabled at timing when an input signal is enabled. A delay signal generation unit(20) generates a delay signal enabled at timing when the input signal is disabled in response to the pulse and the input signal. The pulse generation unit generates the pulse to generate the delay signal having an equal enable period to the enable period of the input signal.