| 摘要 |
An analogue signal modelling routine for a hardware description language, wherein an output providing an analogue signal is represented by a value stored in an output variable, an input accepting the analogue signal is represented by a value stored in an input variable, and the routine is arranged to update the value stored in the input variable when the value stored on the output value is changed. The level of an analogue signal can be represented using a floating point number. The modelling may simulate an integrated circuit (IC) by making a simplification such as using an artificial channel component that can be easily inverted rather than a real one. This method of simulation may be used to "test" (i.e. simulate) an IC, for instance a decision feedback equaliser (DFE) in a receiver circuit. The invention may be used in the design of serialisation-deserialisation (SerDes) circuits which transfer data between ICs. |
