| 摘要 |
A sub test mode signal generating apparatus is provided to reduce layout area by reducing the number of lines of test mode signals. A shift register part(410) receives data while a test mode control signal is enabled, and then stores the data until next enable time of the test mode control signal. A decoding part(400-1) outputs a test mode signal according to a signal generated by decoding an output signal of the shift register part, and initializes the test mode signal according to a reset signal. The decoding part includes a decoder part(420) outputting an output signal by decoding the output of the shift register part, a reset part(430) outputting the reset signal by receiving an output signal of the shift register part and a latch part(440) initializing the test mode signal by the reset signal.
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