发明名称 Two-dimensional queuing/de-queuing methods and systems for implementing the same
摘要 Systems and methods for queuing and de-queuing packets in a two-dimensional link list data structure. A network processor processes data for transmission for a plurality of Virtual Connections (VCs). The processor creates a two-dimensional link list data structure for each VC. The data field of each data packet is stored in one or more buffer memories. Each buffer memory has an associated buffer descriptor that includes a pointer to the location of the buffer memory, and a pointer pointing to the memory of the next buffer descriptor associated with a buffer memory storing data for the same packet. Each data packet also has an associated packet descriptor including a pointer pointing to the memory location of the first buffer descriptor associated with that packet, and a pointer pointing to the memory location of the packet descriptor associated with the next data packet queued for transmission. A VC descriptor for each VC keeps track of the memory locations of the next packet descriptor and the next buffer descriptor to be de-queued, and the memory locations for storing the next packet descriptors and the next buffer descriptors to be queued.
申请公布号 US7411968(B2) 申请公布日期 2008.08.12
申请号 US20030637723 申请日期 2003.08.07
申请人 INTEL CORPORATION 发明人 CHONG SIMON;HUANG ANGUO TONY;TRINH MAN DIEU
分类号 H04L12/28;G06F9/46;G06F12/02;H04L12/24;H04L12/46;H04L12/56;H04L29/06;H04L29/08;H04L29/12;H04Q11/04 主分类号 H04L12/28
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