发明名称 Interconnect structure encased with high and low k interlevel dielectrics
摘要 A structure for improving the electrostatic discharge robustness of an integrated circuit having an electrostatic discharge (ESD) device and a receiver network connected to a pad by interconnects. The interconnect between the pad and the ESD device has a high-k material placed adjacent to at least one surface of the interconnect and extending over the thermal diffusion distance of the interconnect. The high-k material improves the critical current density of the interconnect by increasing the heat capacity and thermal conductivity of the interconnect. The high-k material can be placed on the sides, top and/or bottom of the interconnect. In multiple wire interconnects, the high-k material is placed between the wires of the interconnect. A low-k material is placed beyond the high-k material to reduce the capacitance of the interconnect. The combination of low-k and high-k materials provides an interconnect structure with improved ESD robustness and low capacitance that is well suited for an ESD device. The interconnect to the receiver, which does not carry a high current, is surrounded by a low-k material for reduced capacitance and performance advantages.
申请公布号 US7411305(B2) 申请公布日期 2008.08.12
申请号 US20050908359 申请日期 2005.05.09
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 VOLDMAN STEVEN H.
分类号 H01L23/52;H01L21/336;H01L21/44;H01L21/768;H01L21/8238;H01L23/40;H01L23/48 主分类号 H01L23/52
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