发明名称 TEST MARK STRUCTURE, SUBSTRATE SHEET LAMINATE, MULTILAYERED CIRCUIT SUBSTRATE, METHOD FOR INSPECTING LAMINATION MATCHING PRECISION OF MULTILAYERED CIRCUIT SUBSTRATE, AND METHOD FOR DESIGNING SUBSTRATE SHEET LAMINATE
摘要 An inspection mark structure has an inspection via hole, which is provided in substrate sheets to be heat-pressed constituting at least two layers of laminates; a round pattern electrode, which is formed on one main face side of the substrate sheet provided with the inspection via hole, and provided around the end face of the inspection via hole at such a predetermined distance as not to come into contact with the end face; and a conduction electrode, which is formed on the other main face side of the substrate sheet provided with the inspection via hole, and provided so as to be electrically connected with the end face of the inspection via hole.
申请公布号 US2008186045(A1) 申请公布日期 2008.08.07
申请号 US20080023144 申请日期 2008.01.31
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 UEDA YOJI;SHIRAISHI TSUKASA;HAYASHI YOSITAKE;OKIMOTO RIKIYA
分类号 G01R31/02;H05K1/00;H05K3/36 主分类号 G01R31/02
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