Power semiconductor e.g. metal oxide semiconductor transistor, component arrangement, has capacitive memory arrangement attached to drift control zone, and charging circuit connected between component zone and capacitive memory arrangement

摘要

The arrangement has a power semiconductor component (10) e.g. metal oxide semiconductor transistor, exhibiting a drift zone (11) that is arranged between a component zone (12) and another component zone (14). A drift control zone (21) is arranged adjacent to the drift zone and is dielectrically isolated by a dielectric layer (29) opposite to the drift zone. A capacitive memory arrangement is attached to the drift control zone, and a charging circuit is connected between the component zone (14) and the capacitive memory arrangement.