发明名称 CIRCUIT FOR USE IN A MULTIPLE BLOCK MEMORY
摘要 A portion of a memory may include a first memory block, comprising a first memory cell coupled to a first memory data line, a second memory block, comprising a second memory cell coupled to a second memory data line, and a latch, having a first terminal and a second terminal. The portion of the memory may further include a first N-channel transistor, having a first current electrode coupled to the first terminal of the latch, having a second current electrode coupled to a first power supply voltage, and having a control electrode coupled to the first memory data line. The portion of the memory may further include a second N-channel transistor, having a first current electrode coupled to the first terminal of the latch, having a second current electrode coupled to the first power supply voltage, and having a control electrode coupled to the second memory data line.
申请公布号 US2008186797(A1) 申请公布日期 2008.08.07
申请号 US20070672279 申请日期 2007.02.07
申请人 GHASSEMI HAMED;NGUYEN HUY B 发明人 GHASSEMI HAMED;NGUYEN HUY B.
分类号 G11C8/00 主分类号 G11C8/00
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