摘要 |
<p>The component has a control block (300) responding to an externally provided command. An error control block (200) has error correcting code (ECC) blocks (210, 220), which implement respective error correcting schemes. The control block (300) selects the operation of the ECC blocks such that the control block operates in accordance with the schemes, when the command indicates a data access procedure, which is directed to single bit and multi-bit data stored in two data storage regions such as single bit cell and multi-bit cell regions (110, 120), of a data storage block (100), respectively. Independent claims are also included for the following: (1) a memory system comprising a memory control module (2) a method for controlling errors in a hybrid flash memory component.</p> |