| 摘要 |
PROBLEM TO BE SOLVED: To improve the processing speed of a vector register computer by using a tailgating technique. SOLUTION: Elements which are generated as a result of second operation synchronously to the sequential readout of addresses used for sequentially reading out operand strings are sequentially stored in a vector register in the address order of the elements by delaying the elements by at least one address, so that the operand strings may be read out sequentially from the vector register and the elements of operated results may be written in the vector register synchronously to the sequential readout. In addition, the sequential designation of readout addresses and the sequential designation of writing addresses are performed by shifting the addresses by a calculated address offset so that the same address may not be designated. COPYRIGHT: (C)2008,JPO&INPIT
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