发明名称 ESD protection for integrated circuits
摘要 The circuit has antenna diode type protection elements (71, 71`) such as grounded gate N-type metal oxide semiconductor (ggNMOS) transistors, associated to capacitive block type circuit nodes (70, 70`), respectively. The elements discharge the nodes for two types of positive and negative loads respectively, when the circuit is not subjected to operational supply voltage. The elements do not allow the circulation of the electric current towards or from the nodes when the circuit is subjected to the voltage, respectively. An independent claim is also included for a method for designing an electronic integrated circuit.
申请公布号 EP1953823(A1) 申请公布日期 2008.08.06
申请号 EP20080100848 申请日期 2008.01.23
申请人 STMICROELECTRONICS SA 发明人 GALY, PHILIPPE;MICHELI, LAURENT;TROUSSIER, GHISLAIN;RIEN, MIKAEL;VENIENT, JEAN-FRANCOIS
分类号 H01L27/02 主分类号 H01L27/02
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