Circuit including a phase detector for selecting a clock signal to output a signal from a bistable element

摘要

A data transmitting device comprises a first flip-flop (310), for latching an input data signal (D1) and to output a data signal (DL) according to a first clock C1); a second flip-flop (320), coupled to the first flip-flop, for latching the data signal and to output an output data signal (D0) according to an output clock (C3); and a phase selector (330), coupled to the first and second flip-flops, for generating the output clock to the second flip-flop according to a determined phase relation between the data signal DL and a second clock.(C2). The frequency of the output clock is substantially equal to the frequency of the second clock. A Bang-Bang phase detector may be used. The input and output signals may reside in different (i.e. analog and digital) signal domains.