Device for probe card power bus voltage drop reduction

摘要

Noise reduction for application of structural test patterns to a Device Under Test (DUT) is accomplished with a capacitor "booster" bypass network on the probe card in which the capacitors are charged to a much higher voltage V_boost than the DUT power supply voltage VDD. Charging the capacitors to a voltage NxVDD allows the buster network to store N times the charge of a conventionally configured capacitance network, and effectively provides N times the capacitance of the original network in the same physical space.