METHOD OF FORMING FINE PATTERNS OF SEMICONDUCTOR DEVICE USING DOUBLE PATTERNING PROCESS

摘要

A method for forming fine patterns of a semiconductor device using a double patterning process is provided to form plural wire lines by using a layout for forming an embossed wire pattern and by patterning a lower layer using a first pattern to form an opening on the lower layer and to form a wire line in the opening. An etching target layer(114) is formed on a substrate(100) including a first region and a second region. Plural first mask patterns(130a) are formed on the etching target layer. The first mask patterns have first pattern density in the first region and second pattern density in the second region. A first capping layer pattern(140a) is formed on the first region to gap-fill a space between two adjacent first mask patterns of the plural first mask patterns. A second capping layer pattern(142a) is formed in the second region to cover a sidewall of the first pattern so that a recess region having a predetermined width remains in the space. Plural second mask patterns(150a) are located on the same level as the first mask pattern in the recess region on the second capping layer. One of a first pattern being comprised of the first capping layer pattern and a second capping layer pattern, and a second pattern being comprised of the first mask pattern and a second mask pattern is removed. The etching target layer is etched by using the selected one pattern as an etching mask.