| 摘要 |
A semiconductor device having a bit line sense amplifier layout is provided to assure process margin by changing the bit line sense amplifier layout structure. According to a layout of a bit line sense amplifier precharge circuit, two active regions(300) are formed along a first direction and a second direction and are arranged adjacently along the first direction. A gate line(310) crosses over the active regions formed along the second direction. A first bit line pair(BL5) and a second bit line pair(BL6) are orthogonal to the gate line, and are arranged on the active region formed along the second direction. A landing pad(330) overlaps with a part of two active regions, and is arranged between the first bit line pair and the second bit line pair.
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