| 摘要 |
A receiver ( 100 ) includes a mixing digital-to-analog converter (DAC) ( 120 ), a direct digital frequency synthesizer (DDFS) ( 116 ), and a clock circuit ( 114 ). The mixing DAC ( 120 ) includes a radio frequency (RF) transconductance section ( 124 ) and a switching section. The RF transconductance section ( 124 ) includes an input configured to receive an RF signal. The switching section ( 128 ) is coupled to the RF transconductance section ( 124 ) and includes inputs configured to receive bits associated with a digital local oscillator (LO) signal. The DDFS ( 116 ) includes outputs configured to provide the bits associated with the digital LO signal to the inputs of the switching section ( 128 ) and a first clock input configured to receive a first clock signal that sets a sample rate for the digital LO signal. The clock circuit ( 114 ) is configured to provide the first clock signal to the first clock input of the DDFS ( 116 ). A frequency of the first clock signal is based on a selected channel and the frequency of the first clock signal is configured to be set to substantially shift spurs that are not dependent on the RF signal out of a band of the analog output signal.
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