发明名称 PLL CONTROL SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To provide a PLL control system capable of suppressing variance in loop band even when charge pump currents are set for each band of a VCO. <P>SOLUTION: The PLL control system includes: a TCX0 8; a frequency divider B8; the VCO 4 having a plurality of bands; a frequency divider A5; a phase comparator 6 which compares two frequency-division signals of the frequency dividers A5 and B8 with each other; a loop filter 2 which outputs a voltage to the VCO 4; a charge pump circuit 3 which supplies a current to the loop filter 2 according to the comparison signal of the phase comparator 6; a precharging circuit 1 which precharges the loop filter 2; and a control section 9, the control section 9 discretely controlling the precharging by the precharging circuit 1 based upon discrete information preset in accordance with the plurality of bands. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008177645(A) 申请公布日期 2008.07.31
申请号 JP20070006748 申请日期 2007.01.16
申请人 RENESAS TECHNOLOGY CORP 发明人 IKUTA ISAO;IGARASHI YUTAKA;SUGIYAMA YOSHIICHI
分类号 H03L7/10;H03L7/087;H03L7/093;H03L7/187 主分类号 H03L7/10
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