发明名称 Rank Select Operation Between an XIO Interface and a Double Data Rate Interface
摘要 In an aspect, a first method of interfacing a processor and memory is provided. The first method includes the steps of (1) generating a first command and associated address of a first type that does not indicate a rank of memory targeted by the first command; (2) determining whether the memory includes a plurality of ranks; (3) if the memory includes a plurality of ranks, employing the processor to update the address associated with the first command to indicate a memory rank targeted by the first command; (4) if the memory does not include a plurality of ranks, employing the processor to update the address associated with the first command to indicate the memory does not include a plurality of ranks; and (5) converting the first command and associated updated address to a second command and associated address that are employed to access the memory. Numerous other aspects are provided.
申请公布号 US2008183985(A1) 申请公布日期 2008.07.31
申请号 US20070668725 申请日期 2007.01.30
申请人 BELLOWS MARK DAVID;HASELHORST KENT HAROLD;IRISH JOHN DAVID;NORGAARD DAVID ALAN 发明人 BELLOWS MARK DAVID;HASELHORST KENT HAROLD;IRISH JOHN DAVID;NORGAARD DAVID ALAN
分类号 G06F12/00 主分类号 G06F12/00
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