发明名称 |
Method for testing electronic components, includes testing auxiliary components and chips, where chips are arranged on wafer and auxiliary components are arranged between chips |
摘要 |
<p>The method includes testing auxiliary components and chips. The chips are arranged on a wafer and the auxiliary components are arranged between the chips. The auxiliary components are tested in a position and are arranged on horizontal border lines. The wafer is turned at ninety degrees around its main axis in another position against the position for testing the auxiliary components, which are arranged on vertical border lines. An independent claim is also included for a device for testing the electronic components.</p> |
申请公布号 |
DE102007005208(A1) |
申请公布日期 |
2008.07.31 |
申请号 |
DE20071005208 |
申请日期 |
2007.01.29 |
申请人 |
SUSS MICROTEC TEST SYSTEMS GMBH |
发明人 |
KIESEWETTER, JOERG;KANEV, STOJAN |
分类号 |
H01L21/66 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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