| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device reduced in power consumption while reducing an adverse effect on the operating speed. SOLUTION: The semiconductor device has: first layout regions 11a and 11b where a first circuit group for clock generation to which a first power supply (VDD-A) is delivered is arranged along a first direction; and second layout regions 12a and 12b where a second circuit group to which a second power supply (VDD-B) higher than the voltage VDD-A is delivered is arranged along the first direction. Each of the layout regions 11a, 11b, 12a and 12b is alternately arranged along a second direction approximately perpendicular to the first direction with a common ground wire (GND) arranged along the first direction sandwiched therebetween. COPYRIGHT: (C)2008,JPO&INPIT
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