发明名称 MULTIPROCESSOR SYSTEM
摘要 PROBLEM TO BE SOLVED: To allow a false sharing to be detected by a simple configuration. SOLUTION: When data to be accessed by a processor is stored in two or more cache memories out of a plurality of first cache memories and a second cache memory provided in common to a plurality of processors, in a multiprocessor system, the first cash memory having un-updated data stored therein is detected when data updated by a write of the processor to the data to be accessed and un-updated data before the write exist, and a detection output is output when it is detected that a write instruction to the data to be accessed has occurred for the first cache memory having the un-updated data stored therein. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008176731(A) 申请公布日期 2008.07.31
申请号 JP20070011816 申请日期 2007.01.22
申请人 TOSHIBA CORP 发明人 MIYAMORI TAKASHI
分类号 G06F12/08 主分类号 G06F12/08
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