发明名称 Phase locked circuit
摘要 A phase locked circuit includes a locked loop circuit having a phase comparator, a voltage controlled oscillator, and a variable frequency divider which divides a clock signal f<SUB>vco </SUB>output from the voltage controlled oscillator by n and outputs it. Additionally, the phase locked circuit includes a band pass filter part which is coupled to an output side of the voltage controlled oscillator via a switching part. A frequency division ratio setting signal to be input into the variable frequency divider is input as a switching signal into the switching part so as to switch a frequency of the clock signal f<SUB>vco </SUB>output from the voltage controlled oscillator. As synchronizing with switching of the frequency, the switching part switches a plurality of band pass filters provided to the band pass filter part and couples to the voltage controlled oscillator.
申请公布号 US2008180143(A1) 申请公布日期 2008.07.31
申请号 US20060463032 申请日期 2006.08.08
申请人 SEIKO EPSON CORPORATION 发明人 SHIGEMORI MIKIO;NOMURA MASATAKA
分类号 H03L7/08 主分类号 H03L7/08
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