| 摘要 |
An apparatus and a method for detecting error between boards in a broadband wireless communication system are provided to prevent error signals from being inputted into a modem board of a base station by checking up the SOP(Start Of Packet) signal, the EOP(End Of Packet) signal and a frame synchronization signal. A signal converter comprises a first interface unit(201), a buffer(203), a flow controller(205), a second interface unit(207) and an error detector(209). The first interface unit converts SPI(System Packet Interface) standard based signals into data and control signals. The buffer stores the data provided from the first interface unit. The stored data is outputted according the control of the flow controller. The flow controller controls the output of the buffer according to the status whether the modem board can receive data. Particularly, the buffer stops data output, if an error detection message is received from the error detector. The flow controller provides the data from the buffer to the second interface unit. The second interface unit outputs the data provided from the flow controller by converting the data into signals depending on the SERDES(SERializer/DESerializer) standard. The error detector confirms data and control signals outputted from the buffer, and detects errors and controls the buffer. The error detector comprises a control signal checkup unit(231), a clock counter(233) and an error signal generator(235).
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