| 摘要 |
A chip combined with a plurality of processor cores and a data processing method thereof are provided to remove inconvenience of porting programs to each independent processor chip and complexity of software architecture, and simplify communication and control among the processor cores. An AP(Application Processor) core(420) performs an operation for implementing a data processing function. An MP(Main Processor) core(410) performs the operation for implementing a processing function and a function for controlling the operation of the AP core. The AP and MP cores process data written in a shared memory(230) respectively combined with the AP and MP cores. A host interface combines with more than one independent application processor chip. The MP core controls the operation of the application processor chip combined through the host interface. A command transferor(415) includes a storage area for storing an ID code from the AP or MP core, and inputs command or right information corresponding to the ID code stored in the storage area to the AP or MP core.
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