发明名称 Simulated error injection system in target device for testing host system
摘要 A method and device are provided that use a sequencer in the device to control interactions on an interface bus. The sequencer is programmed to interrupt a co-processor before execution of a command. Based on the interrupt signal and a stored error mode page, a false error condition is initiated by further programming the sequencer to operate abnormally. After recovery from the error condition, the sequencer is reprogrammed to operate normally.
申请公布号 US7406628(B2) 申请公布日期 2008.07.29
申请号 US20040823225 申请日期 2004.04.13
申请人 SEAGATE TECHNOLOGY LLC 发明人 EDGAR BRIAN T.;LI FENG;SCHMIDT MARK A.
分类号 G06F11/00;G06F11/267 主分类号 G06F11/00
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