| 摘要 |
A test device of a semiconductor device is provided to effectively detect an SAC defect between a gate and a landing plug by applying a core voltage to a cell plate voltage applied stage. A test device of a semiconductor device comprises a memory cell(C), a word line voltage selection part(40), and a cell plate voltage selection part(50). The memory cell reads and writes data to be accessed by a word line(WL) and a bit line(BL) and includes a cell transistor and a capacitor. The word line voltage selection part selectively supplies ground voltage and back bias voltage to the word line. The cell plate voltage selection part selectively supplies bit line pre-charge voltage and core voltage to a cell plate voltage applied stage of the capacitor.
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