| 摘要 |
A semiconductor device and a method for manufacturing the same are provided to lower hole injection efficiency from a P collector layer to an N drift layer during ON, using a high activating layer of an N buffer layer, thereby increasing turn OFF speed. A plurality of MOSFETs are formed with stripe shapes on a wafer(11). A P base layer(13) is formed on an N drift layer(12). An N+ emitter layer(14) is formed on a part of the P base layer. A gate electrode(16) is formed in a trench groove through a gate insulating layer(15). An insulating layer(17) is formed on the gate electrode. An N buffer layer(21) is formed below the wafer. A P collector layer(22) is formed below the wafer. An emitter electrode(23) is formed on the wafer. A collector electrode(24) is formed below the wafer. High and low activating parts(21a,21b) are formed with stripe shapes alternately.
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