A memory layout relates to automation and computer engineering and intended for realization of function of a number of states on the base of binary elements AND-NOT or OR-NOT.
申请公布号
UA34166(U)
申请公布日期
2008.07.25
申请号
UA20080004085U
申请日期
2008.04.01
申请人
MARAKHOVSKYI LEONID FEDOROVYCH;MIKHNO NATALIA LEONIDIVNA;POHREBNIAK VITALII DMYTROVYCH
发明人
MARAKHOVSKYI LEONID FEDOROVYCH;MIKHNO NATALIA LEONIDIVNA;POHREBNIAK VITALII DMYTROVYCH
