SEMICONDUCTOR MEMORY DEVICE AND SENSE AMPLIFIER CIRCUIT

摘要

PROBLEM TO BE SOLVED: To improve a margin of read-out operation by further expanding a voltage difference when a current difference determined by a cell resistance is changed to voltage.

SOLUTION: The device includes a memory cell MC and a reference cell RC respectively having variable resistance elements, and a sense amplifier circuit (bit line sense amplifier 7B). The bit line sense amplifier 7B includes: a differential amplifier DAMP; a voltage gate transistor (75N) connected between the first differential input (input voltage VIN) and a sense line (global bit line GBL) and capable of holding a precharge voltage (gate supply voltage VGATE) on a control terminal; a reference voltage gate transistor (75N) connected between a second differential input (reference input voltage VIN (Ref.)) and reference sense line (global reference bit line GBL(Ref.)) and capable of holding the gate supply voltage VGATE on the control terminal; and two coupling capacitors CCs cross-coupled between the first and second differential inputs and control terminals of voltage gate transistors (75N).

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