发明名称 COUNTER STANDALONE TYPE DIGITAL FREQUENCY DIVIDER CIRCUIT
摘要 PROBLEM TO BE SOLVED: To share a counter among a plurality of dividers with different division ratios and phases, and to reduce a logical amount and the power consumption of the whole divider circuit by making the division ratio and the phase of the divider independent of a counter period and phase. SOLUTION: The divider 2 having the division ratio and the phase independent of the period and the phase of the counter 1 is attained by predicting a counter value 101 after one division period by an adder 21 and the counter 1 is shared by the plurality of dividers having similar structures. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008172649(A) 申请公布日期 2008.07.24
申请号 JP20070005301 申请日期 2007.01.15
申请人 HITACHI LTD 发明人 HAYAKAWA KOSEN
分类号 H03K23/00;H03K21/00;H03K23/64 主分类号 H03K23/00
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