发明名称 Inversion of alternate instruction and/or data bits in a computer
摘要 A basic computer circuit ( 30 ) with alternate bits inverted. Two 18-bit registers ( 32, 34 ) are connected to ALU ( 36 ) to perform ripple-carry addition, wherein 1-high number representation is implemented in the circuit portions corresponding to odd-numbered bit positions, and inverse representation, in even-numbered bit positions. Owing to alternate bit inversion, carry calculation for 1-bit addition can be performed in only one inverter latency, resulting in a fast 18-bit adder with small die area. Inverted number representation in alternate bit positions can be used in other combinatorial circuits, where an extra inverter stage is conventionally required to adjust the logic level, to reduce latency of operation and die area.
申请公布号 US2008177817(A1) 申请公布日期 2008.07.24
申请号 US20070005156 申请日期 2007.12.21
申请人 MOORE CHARLES H 发明人 MOORE CHARLES H.
分类号 G06F7/42 主分类号 G06F7/42
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