发明名称 HYBRID BUILT-IN SELF TEST (BIST) ARCHITECTURE FOR EMBEDDED MEMORY ARRAYS AND AN ASSOCIATED METHOD
摘要 Disclosed are embodiments of a built-in self-test (BIST) architecture that incorporates a standalone controller that operates at a lower frequency to remotely perform test functions common to a plurality of embedded memory arrays. The architecture also incorporates command multipliers that are associated with the embedded memory arrays and that selectively operate in one of two different modes: a normal mode or a bypass mode. In the normal mode, instructions from the controller are multiplied so that memory array-specific test functions can be performed locally at the higher operating frequency of each specific memory array. Whereas, in the bypass mode, multiplication of the instructions is suspended so that memory array-specific test functions can be performed locally at the lower operating frequency of the controller. The ability to vary the frequency at which test functions are performed locally, allows for more test pattern flexibility.
申请公布号 US2008178053(A1) 申请公布日期 2008.07.24
申请号 US20080057405 申请日期 2008.03.28
申请人 GORMAN KEVIN W;PAPARELLI ADRIAN J;ROBERGE MICHAEL A 发明人 GORMAN KEVIN W.;PAPARELLI ADRIAN J.;ROBERGE MICHAEL A.
分类号 G11C29/12;G06F11/27 主分类号 G11C29/12
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