发明名称 |
MANUFACTURING METHOD OF DRAM CAPACITORS AND CORRESPONDING DEVICE |
摘要 |
<p>The invention concerns a method of forming capacitors in a first layer (204) of an integrated dram circuit, the first layer (204) comprising isolated bottom plates (222) formed lining trenches (220) in an insulating layer (218), each of the bottom plates being etched back such that it does not extend to the top of the trench in which it is formed, the method consisting of depositing a dielectric layer (225) over the first layer, covering the bottom plates; depositing a layer (228) of conducting material over the first layer, the layer of conducting material filling the trenches (220),- etching, in a first region (232) including the area above an edge of each of the adjacent bottom plates, the layer of conducting material and the dielectric layer to a depth chosen such that the insulating layer is exposed and the bottom capacitor plate is not exposed by said etch; and forming, in the first region, a contact traversing the first layer in between the adjacent bottom plates of the capacitors.</p> |
申请公布号 |
WO2008087499(A1) |
申请公布日期 |
2008.07.24 |
申请号 |
WO2007IB50820 |
申请日期 |
2007.01.17 |
申请人 |
STMICROELECTRONICS CROLLES 2 SAS;NXP B.V.;FREESCALE SEMICONDUCTOR, INC.;CAILLAT, CHRISTIAN;BERTHELOT, AUDREY;PIAZZA, MARC;PERINO-GALLICE, LAURENCE;BOECK, BRUCE;DE JONGHE, VERONIQUE |
发明人 |
CAILLAT, CHRISTIAN;BERTHELOT, AUDREY;PIAZZA, MARC;PERINO-GALLICE, LAURENCE;BOECK, BRUCE;DE JONGHE, VERONIQUE |
分类号 |
H01L21/8242;H01L21/02;H01L27/02;H01L27/108 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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