| 摘要 |
A semiconductor memory device is provided to receive an outer command signal transferred from a chipset by synchronizing the outer command signal by a positive/negative command strobe signal. A command signal transferred from a chipset(400) is received by a plurality of command pins. A positive command strobe pin receives a positive command strobe signal(COS) as an echo signal of the command signal wherein the positive command strobe signal is transferred from the chipset. A negative command strobe pin receives a negative command strobe signal(/COS) as an echo signal of the command signal, transferred from the chipset.
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