| 摘要 |
To improve a degree of integration and reliability of a semiconductor integrated circuit device. There are included third wire 14 arranged in the same layer as first wire 11 and second wire 12 and arranged in a direction intersecting with the first wire 11 and the second wire 12 , first gate material wire 18 arranged between the first wire 11 and first well 5 in the vicinity of an intersecting point between wiring directions of the first wire 11 and the third wire 14 and electrically connected to the third wire 14 through via holes, and first diffusion layer 6 arranged in second well 4 in the vicinity of an intersecting point between wiring directions of the second wire 12 and the third wire 14 . The first diffusion layer 6 is electrically connected to the third wire 14 through via holes and each includes impurities having a concentration higher than each of the second wells 4 . The first gate material wire 18 and the first diffusion layer 6 are used as a wire path for substrate back-bias control associated with the third wire 14.
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