发明名称 |
Method and apparatus for handling small packets |
摘要 |
In one embodiment, the invention is an apparatus. The apparatus includes comparison logic to compare received data values to an expected data value, producing a first result. The apparatus also includes combinatorial logic coupled to the comparison logic. The combinatorial logic is to use the first result to encode in a second result which path of a set of paths the received data should traverse. The apparatus also includes transfer logic coupled to the combinatorial logic. The transfer logic is to transfer the received data values to each of three paths using the second result.
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申请公布号 |
US7400620(B1) |
申请公布日期 |
2008.07.15 |
申请号 |
US20020325415 |
申请日期 |
2002.12.19 |
申请人 |
CYPRESS SEMICONDUCTOR CORPORATION |
发明人 |
VERMA VATAN KUMAR |
分类号 |
H04L12/28;G06F15/16;H04J3/24;H04L12/58 |
主分类号 |
H04L12/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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