发明名称 Semiconductor device having input circuits activated by clocks having different phases
摘要 Input circuits connected to an external input terminal PAD via resistor elements are activated in response to the level transition of the clock signals supplied thereto for accepting input signals. In order to input signals applied to the external input terminal PAD clock signals having different phases are supplied to the respective input circuits. The cycle time of each one input circuit can be made longer by sequentially assigning the serial data supplied to the external input terminals in response to the clock signals having different clock signals. Since the input circuits are isolated from each other by means of the resistor elements, the influence of the kick back signal which occurs at first stage of each the input circuit upon the other input circuit can be made very small.
申请公布号 US7400180(B2) 申请公布日期 2008.07.15
申请号 US20050296287 申请日期 2005.12.08
申请人 ELPIDA MEMORY, INC. 发明人 ISHIKAWA TORU;KATOU KUNIHIKO
分类号 H03L7/00 主分类号 H03L7/00
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