发明名称 |
Count calibration for synchronous data transfer between clock domains |
摘要 |
Systems and methods for implementing count calibration for synchronous data transfer between clock domains are disclosed. An exemplary system may include a count calibration circuit for determining latency between an early clock domain and a late clock domain. The system may also include a data path configurable for synchronous data transfer between clock domains based at least in part on the latency.
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申请公布号 |
US7401245(B2) |
申请公布日期 |
2008.07.15 |
申请号 |
US20050118600 |
申请日期 |
2005.04.29 |
申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. |
发明人 |
FISCHER TIMOTHY C.;NAFFZIGER SAMUEL;PATELLA BENJAMIN J. |
分类号 |
G06F1/12;G06F1/04;G06F1/06;G06F13/42 |
主分类号 |
G06F1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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