| 摘要 |
A semiconductor memory apparatus is provided to prevent error of a sensing operation of a second bit line pair after the second bit line pair is equalized without floating the second bit line pair disabled during sensing amplification of a first bit line pair enabled in the semiconductor memory apparatus where one sense amplifier senses and amplifies two bit line pairs. A first equalizing part(110) enables a first bit line pair to have an equal voltage level according to a second bit line separation signal. A first connection part(210) connects or disconnects the first bit line pair to/from a first electrode and a second electrode according to a first bit line separation signal. A precharging part(400) precharges the first bit line pair and a second bit line pair according to a bit line equalization signal. A sense amplifier(300) senses and amplifies one of the first or the second bit line pair according to a sense amplifier control signal. A second connection part(220) connects or disconnects the second bit line pair to/from the first electrode and the second electrode according to the second bit line separation signal. A second equalizing part(120) enables the second bit line pair to have an equal voltage level according to the first bit line separation signal.
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