发明名称 |
TIMING GENERATING CIRCUIT FOR DISPLAY AND DISPLAY HAVING THE SAME |
摘要 |
<p>A timing generation circuit (15) is formed integrally on the same glass substrate (11) together with a display area section (12) similarly to an H driver (13U) and a V driver (14), and timing pulses to be used by the H driver (13U) and the V driver (14) are produced based on timing data produced by a shift register (31U) of the H driver (13U) and a shift register (14A) of the V driver (14). The invention thereby provides a timing generation circuit which can contribute to miniaturization and reduction of the cost of the set and a display apparatus of the active matrix type in which the timing generation circuit is incorporated. <IMAGE></p> |
申请公布号 |
EP1343134(A4) |
申请公布日期 |
2008.07.09 |
申请号 |
EP20010999936 |
申请日期 |
2001.12.06 |
申请人 |
SONY CORPORATION |
发明人 |
NAKAJIMA, YOSHIHARU;MAKI, YASUHITO;MAEKAWA, TOSHIKAZU |
分类号 |
G09G3/20;G09G3/30;G09G3/36;(IPC1-7):G09G3/30;G02F1/133 |
主分类号 |
G09G3/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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