发明名称 |
PRE-EMPHASIS OUTPUT CIRCUIT WITH ADJUSTABLE TAPPED DELAY LINE |
摘要 |
A pre-emphasis output circuit is provided to perform a pre-emphasis operation without inputting an additional clock signal and recovering a clock of data because a plurality of delayers does not have the same delay time. In a pre-emphasis output circuit, a main driver(11) receives and amplifies a data signal, and outputs the data signal at an output terminal. A shared load(14) is connected to the output terminal of the main driver. A delay line(13) includes a plurality of delayers which are connected in series and control delay time according to a control voltage respectively, receives the data signals and outputs the delay signals to delay the data signals as much as the delay time, to each delayer. A plurality of tap drivers(121,122,123,124) amplify the delay signals and includes the pre-emphasis output circuit connected to add the delay signals at an output terminal of the main driver. |
申请公布号 |
KR20080064261(A) |
申请公布日期 |
2008.07.09 |
申请号 |
KR20070000970 |
申请日期 |
2007.01.04 |
申请人 |
KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY |
发明人 |
KIM, JOUNG HO;LEE, JI WANG;KIM, JIN GOOK;SONG, EAK HWAN;CHO, JEONG HYEON |
分类号 |
H03K19/003 |
主分类号 |
H03K19/003 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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