| 摘要 |
A P-channel MOS transistor and an N-channel MOS transistor are respectively controlled by a first control signal and a second control signal. The first control signal CTL 1 and the second control signal CTL 2 are independent from each other. The second control signal CTL 2 is generated by a NOR circuit 2 to which a data signal DATA and a third control signal CTL 3 are inputted. A load capacitor C 1 which samples the first electric potential or the GND electric potential is configured by a gate capacitance of another MOS transistor.
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