METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY

摘要

A TFT array manufacturing method is provided to remove a conductive layer for forming source and drain electrodes through dry etching, thereby accurately controlling a pattern size. On a substrate, a gate electrode is formed(S800~S806). On the substrate including the gate electrode, a gate insulating layer, a semiconductor layer and a conductive layer are sequentially laminated(S808,S810). The semiconductor layer includes an active layer and an ohmic contact layer. The conductive layer is dry-etched through an electrode pattern where a source electrode and a drain electrode are not separated(S814). By etching the semiconductor layer of a pattern area unhidden by the electrode pattern as forming source and drain electrodes by etching a channel area of the electrode pattern, the gate insulating layer is exposed.