发明名称 |
NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE, AND ITS MANUFACTURING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To improve the resistance to erroneous writing (disturb) of a split gate MONOS memory cell and to increase the operating speed of the memory cell. SOLUTION: In the non-volatile semiconductor memory device, a charge accumulation layer is eliminated from element isolation regions and from an insulation region between a memory transistor and a select transistor to prevent electric charges from being injected and accumulated in these regions. On the element isolation regions, a gate electrode of the memory transistor is put together at a higher position from the surface of a silicon substrate 000 than a gate electrode of the select transistor to reduce a capacity between the memory transistor and the select transistor. COPYRIGHT: (C)2008,JPO&INPIT
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申请公布号 |
JP2008153355(A) |
申请公布日期 |
2008.07.03 |
申请号 |
JP20060338386 |
申请日期 |
2006.12.15 |
申请人 |
RENESAS TECHNOLOGY CORP |
发明人 |
ARIKANE TAKESHI;HISAMOTO MASARU;SHIMAMOTO YASUHIRO |
分类号 |
H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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