| 摘要 |
A high-speed radix-4 butterfly module and the method of performing Viterbi decoding using the same. The high-speed radix-4 butterfly module includes first to fourth add-compare-select (ACS) circuits. The first and the second ACS circuits receive first to fourth branch metric values and first to fourth previous-stage path metric values, and accordingly produces a first and a second path metric values. The third and the fourth ACS circuits receive fifth to eighth branch metric values and the first to the fourth previous-stage path metric values, and accordingly produces a third and a fourth path metric values. The radix-4 butterfly unit of the invention uses the symmetric relation to reduce an amount of branch computation required for each radix-4 butterfly unit to a half. Thus, the circuit complexity of the typical radix-4 butterfly module and the hardware cost of the Viterbi decoder are reduced.
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